The entire disclosure of Japanese Patent Application No. 10-243868, filed on Aug. 28, 1998, priority of which is claimed under 35 USC 119, including specification, claims, drawings, and summary are incorporated herein by reference in its entirety.
The present invention relates to methods for reclaiming wafer substrates, more particularly to a method for reclaiming a used semiconductor wafer substrate so that the substrate is of a quality which is substantially comparable to a prime grade wafer used in the production of semiconductor devices.
In the production of semiconductor devices, two grades of single crystal silicon wafers, e.g., a prime grade and a test grade, are used. The prime grade wafers are used for producing actual semiconductor devices, and the test grade wafers are used to determine whether or not the production process is sufficiently satisfactory. The quality standard for the prime grade is more stringent than that for the test grade. Semiconductor manufacturers use test grade wafers having the quality comparable to that of prime grade wafers by preference. Such test grade wafers are expensive compared to general test grade wafers. A typical used semiconductor wafer has a doped and/or diffused zone beneath the original front surface, and conductive and dielectric layers, which are formed on the doped or diffused zone.
In reclamation of a wafer substrate, both the surface layers and the doped or diffused zone beneath the wafer surface are removed. Used wafers delivered to reclamation plants are made of various materials and have a variety of surface structures and subjacent layers. For example, some wafers used for measurement of film thickness have several surface layers, and some wafers rejected in the production process have their own film structures, combinations of film materials, and doped elements.
A variety of conventional methods for reclaiming used semiconductor wafers are in use. Since these methods remove large amount of material from the surface as compared to the thickness of surface layers and diffused or doped zones, a wafer can be recycled only once or twice.
The most frequently used conventional method is a chemical etching process. For example, U.S. Pat. No. 3,923,567 discloses a process for dipping a wafer substrate having a surface layer into an etching bath containing sulfuric acid to remove organic substances, hydrochloric acid and nitric acid to remove metallic substances, and hydrofluoric acid to remove oxides and nitrides. According to this patent, a preferable etching rate is 12 xcexcm/sec. A mixture of nitric acid (HNO3) and hydrofluoric acid (HF) is frequently used as an etching solution for reclamation, since the mixture can remove most films and doped or diffused zones.
Wafers can also be reclaimed by a lapping process. The lapping process can remove various materials on the wafer regardless of the surface structure and pattern and the constituents on the wafer, unlike the chemical etching process. In the lapping process, a wafer is pressed against a rotating metal plate, while a lapping solution is supplied between the wafer surface and the plate (the lap). In double-side lapping, a wafer is pressed between a pair of metal plates (generally, cast-iron plates), which rotate in the opposite directions. The abrasive grains collide with the wafer surface to generate small cracks beneath the wafer surface and to remove the surface materials.
U.S. Pat. No. 5,855,735 discloses a method for decreasing sub-surface damage by a lapping process. This method comprises removing surface material by inducing micro-fractures in the surface using a rotating pad and an abrasive slurry, and chemically etching the surfaces of the wafer until all micro-fractures are removed therefrom.
Another method for reclaiming the wafer is a polishing process. In single-side polishing, a wafer surface is pressed onto a rotating pad, while a polishing solution containing abrasive grains is supplied between the pad and the wafer surface to remove the surface materials. In double-side polishing, a wafer is sandwiched between a pair of pads which rotate in opposite directions, while fine abrasive grains are supplied therebetween to remove small amount of material from surface. Thus, this method can significantly reduce subsurface damage compared to the above-mentioned lapping process.
The most frequently used polishing process is chemical-mechanical polishing using a polishing solution containing various chemicals. That is, the chemicals contribute to cleaving or weakening inter atomic bonds at the surface of a workpiece to be polished, while abrasive grains enhance wiping effects of the surface of the workpiece. Silicon wafers are usually subjected to single-side polishing using a polishing solution containing fine alkaline colloidal silica particles having diameters of 1 xcexcm or less, in addition to potassium hydroxide, ammonium hydroxide and an organic amine. According to the Journal of The Society of Grinding Engineers, Vol. 40, No. 1, p. 19 (1996), a variety of abrasive grains, such as alumina, titania, zirconia, ceria, and silica, have been tested for polishing silicon wafers, and all of the abrasive grains other than silica cause oxidation induced stacking fault (OSF). Various opinions are proposed for the fact that alkaline colloidal silica is specifically suitable for polishing of silicon wafers. Although chemical-mechanical polishing, as a combination of mechanical polishing by fine silica particles and chemical etching by alkaline components, yields such specific polishing characteristics, details are still unknown. Polishing is performed to remove surface damage formed in the lapping step and to produce a mirror surface.
Chemical-mechanical polishing can also remove various films on the wafer surface. In recent production processes of semiconductor devices, multilayered configurations have been common. Since the multilayered configuration causes a difference in level of the film surface, the configuration will result in defocusing during the exposure step of the pattern of the device. Thus, the film surface of the multilayered configuration is generally planarized. Chemical-mechanical polishing is employed for planarization of the film surface to effectively remove particular film components so that the flatness of the film surface may be improved. Accordingly, chemical-mechanical polishing requires high selectivity for removal of the film components so that a specified component is more effectively removed than other components.
For example, the planarization of the aluminum wiring layer uses an acidic polishing solution containing aluminum oxide abrasive particles, hydrogen peroxide, and iron nitrate so that silicon oxide as a component of an dielectric layer is removed as little as possible. In contrast, the planarization of the dielectric layer composed of silicon oxide or the like uses an alkaline polishing solution containing silicon oxide (fumed silica) abrasive grains, potassium hydroxide (KOH), ammonium hydroxide (NH4OH), and an organic amine so that the metallic wiring layer is removed as little as possible.
Such a chemical etching process can simply and uniformly reclaim the etching surface when the reclaimed wafer has a relatively small size, since the wafer has a relatively simplified film configuration. This chemical etching process, however, is not effective for uniform reclamation of a large wafer having a complicated surface film configuration and containing many components. Although many types of etching solutions must be prepared for effectively etching individual layers formed on a wafer, these etching solutions are not always useful for etching other wafers having different film components and configurations.
When each layer has a pattern, the etching rate of a portion of a specified layer is different from the etching rate of another portion of the layer. Thus, the bottom most layer inevitably has an irregular surface. For example, tungsten silicide (WSi) is a material which is barely removed by chemical etching.
A mixture of nitric acid (HNO3) and hydrofluoric acid (HF) can remove most films and doped elements and is useful for removal of surface layers having complicated film configuration and composition. However, the silicon wafer substrate is also etched rapidly and unevenly. Since diffusion of the acid components controls reaction of the acid components with silicon, insufficient diffusion causes an uneven etching surface. Since acid is consumed before it diffuses, the acid diffused from the periphery of a large wafer is consumed before it reaches the center of the wafer. Thus, the center has an etching rate which is lower than that of the periphery. As a result, the center of the reclaimed wafer has a greater thickness compared to the thickness of the periphery, i.e. it has a crowned center.
Accordingly, the use of acid in reclamation of a used silicon wafer further facilitates unevenness of the surface after etching, since most components, including oxide films and nitride films, have etching rates which are lower than that of silicon.
When a used silicon wafer is immersed in an acid mixture, the periphery is first removed and then the center is removed. Since the silicon substrate is rapidly etched in this etching solution, the periphery of the reclaimed wafer is thinner than the center. A deviation in thickness due to such uneven etching rates reaches 20 to 40 xcexcm for an 8-inch wafer, and thus the customer requirements for uniform thickness are not satisfied.
In the lapping process, use of a metal plate causes deep sub-surface damage on the wafer surface. If such deep sub-surface damage remains on the final reclaimed semiconductor wafer, it will result in deposition of dust or contamination, causing significant defects in the reclaimed wafer. Thus, the lapping process requires a subsequent chemical etching or polishing process to remove microcracks on the wafer surface and to ensure a smooth surface. Since the depth to be removed in this process depends on the deepest crack, the final decrease in the thickness is significantly large even if the decrease is minimized in the lapping process. As a result, the number of possible recycles per wafer is inevitably small. It is difficult to completely prevent formation of microcracks, even when a pad is used instead of the metallic surface plate. Accordingly, a technique is needed to minimize the decrease in thickness in the reclamation process as much as possible.
If the film on the silicon wafer can be removed by chemical-mechanical polishing, the polished wafer has a mirror surface which substantially corresponds to the surface after rough polishing of a virgin wafer. Thus, load on the subsequent steps can be significantly reduced, and the simplified steps will contribute to decreased production costs. Unlike in planarization in the semiconductor production steps, all types of films must be removed in the chemical-mechanical polishing. Furthermore, the silicon wafer itself must be polished to some extent in order to remove a degenerate zone beneath the surface of the wafer. Thus, the polishing solution must be effective for both the film and the wafer. In conventional polishing solutions, the size of the abrasive grains and selection of additives are selected so as to be effective for specified materials. The conventional polishing solutions are, therefore, unsuitable for effective polishing of certain films or materials. For example, alkaline colloidal silica for polishing a silicon wafer is not effective for polishing oxide and nitride films, as described above. Although cerium oxide can effectively polish a silicon oxide or nitride film, it is not suitable for polishing of the silicon wafer. Accordingly, there is no polishing solution suitable for a wide variety of components.
Under these circumstances, chemical-mechanical polishing is used only for finishing treatment of the surface after removal of the surface layer in the reclamation process.
Summary, Objects and Advantages
It is an object of the present invention to provide a method for reclaiming a wafer substrate, which is capable of minimizing a decrease in thickness of the wafer substrate in the reclamation process and increasing the number of times a wafer substrate may be recycled.
It is another object of the present invention to provide a polishing solution composition and film removal method capable of effectively polishing a silicon wafer having a wide variety of nonmetallic films, such as silicon, silicon oxide, and silicon nitride films, formed on the silicon wafer to form a mirror surface on the silicon wafer after removing the films.
In an aspect of the invention, a method is provided for reclaiming a wafer substrate including a chemical etching step for removing an entire metallic film and at least a part of a dielectric film on a wafer substrate material with a chemical etching agent so as not to substantially dissolve the wafer substrate material itself, a chemical-mechanical polishing step for removing the residual dielectric film and the degenerate zone beneath the surface of the substrate material, and then a finish polishing step for finish-polishing at least one surface of the substrate.
This process can minimize the decrease in total thickness of a used wafer to 20 xcexcm or less, resulting in an increase in the number of times a used wafer substrate may be recycled.
Preferably, the chemical etching agent is at least one chemical etching agent selected from the group consisting of phosphoric, sulfuric, hydrofluoric, hydrofluoric-nitric, and hydrochloric-nitric chemical etching agents.
Preferably, the surface layer removal chemical-mechanical polishing step uses a polishing solution composition composed of at least one abrasive grain or sol material selected from the group consisting of aluminum oxide, zirconium oxide, cerium oxide, and silicon oxide. In addition, the polishing solution composition preferably has a pH of 8 to 12.
A grain is generally present in an aggregate of fundamental particles called primary particles, and the average size of the abrasive grains as aggregates is defined as the average particle size. Preferably, the abrasive grains contained in the polishing solution composition have an average primary particle size of about 30 to 2,000 nm. Preferably, the polishing solution composition contains about 1 to 30 percent by weight of abrasive grains or sols.
More preferably, the chemical-mechanical polishing step uses a polishing solution composition containing from about 2 to about 20 percent by weight of monoclinic zirconium oxide having a primary particle size of from about 30 to about 1,000 nm and a crystallite size of about 10 to 1,000 nm, and having a pH of 9 to 12.
Preferably, the zirconia polishing solution composition contains at least one alkaline component selected from the group consisting essentially of alkaline hydroxides, alkaline carbonates, ammonia, hydrazine, alkylammonium hydroxides, organic amines, and alkanolamines, in order to further improve polishing efficiency. Optionally, water-soluble alkaline silicate may be used with the zirconia polishing solution.
Alternatively, the chemical-mechanical polishing step may use a polishing solution composition containing from about 1 to about 20 percent by weight of cerium oxide having a primary particle size of from about 10 to about 2,000 nm, more preferably from about 10 to about 1,000 nm, and an average particle size of from about 30 to about 5,000 nm, containing a water-soluble alkaline silicate such as potassium silicate, and having a pH of 9 to 12.
Preferably, the cerium oxide polishing solution composition contains at least one alkaline component selected from the group consisting essentially of alkaline hydroxides, alkaline carbonates, ammonia, hydrazine, alkylammonium hydroxides, organic amines, and alkanolamines, in order to further improve polishing efficiency.
In the chemical-mechanical polishing step, the wafer substrate is preferably held between a pair of surface plates, each provided with a pad on a surface thereof, to simultaneously and effectively polish the two faces of the wafer substrate.
These compositions can minimize a decrease in total thickness of a used wafer to 20 xcexcm or less in a reclaiming process, resulting in an increase in the number of times a used wafer substrate may be recycled.